With the rapid growth of packet services, the communication network design in the future shall mainly aim at optimization and support of packets. The optical network packet switching technology is capable of broadening the existing network bandwidth, and a network node has a high information throughput, which is suitable for supporting a packet service that is highly unexpected and frequently changed, especially an IP service.
Nowadays, an optical packet switching network generally consists of edge nodes and a core node connected by a dense wavelength division multiplexing (DWDM) fiber link. A data packet is transmitted from an edge node through the DWDM fiber link to arrive at the core node, is then switched by a switching module of the core node, and is finally sent to a destination edge node.
FIG. 1 shows a scheme of a feedforward connection of a core node structure. The structure has P ingress ports corresponding to P egress ports, each port having M wavelengths, and employing a switching matrix of a PM×PM scale. That is, the switching matrix includes PM ingress ports and PM egress ports. A wavelength conversion is performed by a tunable wavelength converter (TWC) on a light wave output from a wavelength division demultiplexer in the connection scheme, and then the light wave enters an optical buffer. The light wave output from the optical buffer enters a combiner of a corresponding output port via the switching matrix of the PM×PM scale. A structure of the optical buffer is shown in FIG. 2, in which each multi-level buffer unit fiber delay line (FDL) consists of four single-level FDLs.
The feedforward connection scheme has the following disadvantages. Since a dedicated multi-level FDL is configured for each wavelength, a large number of FDLs are required, so that the scale of the core node is large. Moreover, a single-plane switching matrix structure, i.e., the switching matrix structure of the PM×PM scale is employed, and the switching matrix consists of switches. If the switch is represented by a 1×2 basic optical switch, the required number of the basic optical switches is 2×PM (PM−1). As a result, the core node has an even larger scale and is difficult to be implemented in an integrated way. Since the optical buffer employs a linear connection structure, the number of the FDLs is limited, and an upper limit of buffer time exists. When the buffer time required by the data packet exceeds the upper limit, the data packet can only be discarded. Since the employed optical buffer is before the switching plane, the problem of head of line blocking exists. That is to say, for two burst data having the same wavelength coming successively from the same ingress port to arrive at different egress ports, if the former burst data is delayed in the optical buffer to a time overlapping the time when the latter burst data exits the optical buffer, the latter burst data is inevitably discarded in the situation that actually the switching plane is idle, and cannot be sent to the corresponding egress port.